Atomic Operations
Since the race condition in the previous example was caused by the compiler generating a sequence of three instructions to increment and decrement the instance variable retainCount
, one solution is to replace the compiler output from the sequence load-modify-store with a single instruction that performs an equivalent operation. In this way, there is no chance for the operation to be interrupted when execution is preempted by another thread. In reality, however, it may not always be possible to replace an operation with a single instruction. Instead, we use a sequence of instructions that behave as if they were a single instruction. This is referred to as an “atomic” operation because the result of the operation is the same as ...
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