Physical Design for 3D Integrated Circuits

5	3D Placement and Routing Pingqiang Zhou and Sachin S. Sapatnekar

CONTENTS

Abstract

5.1    Introduction

5.2    3D Placement

5.2.1    TSV-Based Integration

5.2.1.1    Thermally Driven 3D Placement

5.2.1.2    Stress-Driven 3D Placement

5.2.1.3    TSV Planning

5.2.2    3D Monolithic Integration

5.3    3D Routing

5.3.1    Gate-Level Routing

5.3.2    Chip-Level Routing

5.4    Summary and Conclusions

References

ABSTRACT

A critical part of building a successful 3D system lies in the ability to physically arrange the circuitry in such a way that manages myriad complexities related to thermal management, wire length optimization, and communication overheads. This chapter first presents an overview of methods for 3D placement, both under TSV-based ...