Physical Design for 3D Integrated Circuits

13	TSV-to-Device Noise Analysis and Mitigation Techniques Brad Gaynor, Nauman Khan, and Soha Hassoun

CONTENTS

Abstract

13.1  Evaluating TSV-to-Device Noise

13.1.1  Modeling Framework

13.1.1.1  Modeling the TSV MOS-C

13.1.1.2  Substrate Coupling Extraction

13.1.1.3  FinFET and Planar Transistor Modeling

13.1.2  TSV Noise-Coupling Comparison: FinFET vs. Planar Transistors

13.1.3  Key Observations

13.2  TSV-to-Device Noise-Mitigation Techniques

13.2.1  Evaluation Framework

13.2.2  Noise Mitigation Techniques

13.2.2.1  Thicker Dielectric Liner

13.2.2.2  Backside Ground Plane

13.2.2.3  Guard Rings

13.2.2.4  GND Plugs

13.2.3  Comparison of Noise-Mitigation Techniques

13.3  Conclusion

References

ABSTRACT

Since 1965, integrated circuit (IC) complexity ...