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Power Integrity Analysis and Management for Integrated Circuits by Donald Bennett, Raj Nair

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Chapter 6. Power Distribution Modeling and Integrity Analysis

S. Tuuna, L-R. Zheng, J. Isoaho and H. Tenhunen. Portions reprinted, with permission, from Modeling of On-Chip Bus Switching Current and Its Impact on Noise in Power Supply Grid. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 16, No. 6, June 2008, pp. 766–770. © 2008 IEEE.

L-R. Zheng and H. Tenhunen. Fast Modeling of Core Switching Noise on Distributed LRC Power Grid in ULSI Circuits. IEEE Transactions on Advanced Packaging, Vol. 24, No. 3, Aug. 2001, pp. 245–254. © 2001 IEEE.

Li-Rong Zheng and Sampo Tuuna

6.1 Introduction

In digital and mixed-signal very-large-scale integration (VLSI) and ultra-large-scale integration (ULSI) circuits, a large number of logic ...

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