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145Non-isolated Circuits
The data sheet also gives an equation in terms of X
C
, R
OUT
, and ESR:
VVV
C
R
RIPPLE(P-P)
IN
OUT
OUT
OUT
(( ) | |)
CC
ESR

2
1
1
4
12
Since R
OUT
is 70 , ESR of a ceramic capacitor will not contribute to that term. 10 F is a
reasonable start for C
OUT
. This yields ripple voltage of:
V
RIPPLE(P-P)
(( . ) | . |)
F
.F F

250 90
1
1
410
027 027
.
13mV
Tantalum capacitors will have ESR on the order of 0.5–3 in this capacitance range and
voltage range (depending on manufacturer and technology), so the ripple voltage will be
signifi cantly larger with tantalum capacitors.
The input capacitor ESR is much more important for an inverting supply because the IC
draws current only while charging the fl ying capacitors. The peak input current is double
the output current. The input ripple is even more important if V
IN
is used as the reference.
Once again, a large value ceramic capacitor with low value ESR is appropriate.
5.7 Layout Considerations
The basic white protoboard you used in your beginner EE classes will work for a small
power supply up to perhaps 20-kHz switching frequency. Not many useful power supplies
run at such a low frequency any more. A modern switching regulator will run from
100 kHz up to several MHz. The harmonics of the switching waveform extend up to the
VHF frequency range. Failure to use a PC board that uses good high-frequency layout
will guarantee disappointing results (and, likely, lots of smoke).
There are two issues that we have to consider. The fi rst is to design the layout of the
power supply circuit so it does not interfere with its own operation. The second is to
consider how the voltages and potentially huge current densities can interfere with the
rest of the system if the power supply is placed too close to sensitive circuits.
Pentium CPUs can draw 40 A. Even 10 m will produce a voltage drop of 0.4 V. In such a
power supply, it is very important to keep low-level signals isolated from the high current
paths of the rectifi ers and switches. It is easy to overlook the magnetic consequences of
such currents. Each loop where this current fl ows is a single turn inductor that we tend
146
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Chapter 5
to ignore. Our example would create as much as 10 A-Turns of AC magnetic fi eld
that
can easily couple into adjacent traces and loops in the power supply and other close
circuits. Pentium applications are rather extreme, but they illustrate how easy it is to have
otherwise inconsequential layout choices become important in switching supplies.
Figure 5.12 shows a representative PCB layout and schematic from the LT1871 data
sheet. This gives a good example of the considerations in layout of a circuit. The fi gure
does not show the bottom of the PCB. The layout needs a large continuous ground plane
on the bottom of the board that extends from the right side of the board to the area of the
via at the IC ground pin. The ground plane should narrow at this point and then expand
to connect to the vias for the timing and measurement circuits. This is indicated in the
Cc
Rc
R3
c4
INTVcc Run
R5
R4
R1
Q1
D1
L1
R2
Sense
Gate
FB
GND
LTC1871
V
IN
u1
Mode
Ith
Freq
Bold lines indicate high current path
V
IN
C
IN
V
OUT
C
OUT
GND
V
IN
C
IN
R4
Rc
R2
R1
R3
Cc
C4
LTC1871
D1
Q1
L1
GND
VIAs to Ground Plane
PIN 1
V
OUT
C
OUT
R5
Figure 5.12 : Representative PCB layout and schematic using the LT1871

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