December 2016
Intermediate to advanced
210 pages
5h 1m
English
Three-level inverter topology is widely used in high-voltage/high-power applications with currently available power devices because of its high-voltage handling and good harmonic rejection capabilities. In the previous chapters, the space vector pulse width modulation (SVPWM) scheme for the two-level inverter is described in detail. However, the three-level inverter roughly has four times better harmonic content compared with two-level topology. The harmonic contents of the output voltage are fewer than those of the two-level inverter at the same switching frequency. In addition, the blocking voltage of each switching device is a half of the dc-link voltage and is thus ...
Read now
Unlock full access