RapidIO: The Next Generation Communication Fabric For Embedded Application

C.1. GENERIC END POINT DEVICES

This section describes the 8/16 LP-LVDS registers for a general end point device. This extended features register block is assigned extended features block ID=0×0001.

Table C.1. Extended feature space reserved access behavior

Byte offset	Space name	Item	Initiator behavior	Target behavior
0×100–FFFC	Extended features space	Reserved bit	Read – ignore returned value[] Write – preserve current value[]	Read – return logic 0 Write – ignored
		Implementation-defined bit	Read – ignore returned value unless implementation-defined function understood Write – preserve current value if implementation-defined function not understood	Read – return implementation defined value Write – implementation-defined
		Reserved register	Read – ignore returned value Write –	Read – return logic 0s Write – ignored
[]
[]

^[] Do not depend on reserved bits being a particular value; use appropriate masks to extract defined bits from the read value

^[] All register writes shall be in the form: read the register to obtain the values of all reserved bits, merge in the desired values for defined bits to be modified, and write the register, thus preserving the value of all reserved bits

C.1.1. Register Map

Table C.2 shows the register map for generic RapidIO 8/16 LP-LVDS end point devices. The block offset is the offset based on the extended features pointer (EF_PTR) to this block. This register map is currently defined only for devices with up to 16 RapidIO ports, but can be extended or shortened if more ...