RapidIO: The Next Generation Communication Fabric For Embedded Application

B.1.1. Register Maps

Table B.2 shows the register map for generic RapidIO 1×/4× LP-Serial end point devices. The block offset is the offset relative to the 16-bit extended features pointer (EF_PTR) that points to the beginning of the block.

The address of a byte in the block is calculated by adding the block byte offset to EP_PTR that points to the beginning of the block. This is denoted as [EF_PTR +xx] where xx is the block byte offset in hexadecimal.

This register map is currently defined only for devices with up to 16 RapidIO ports, but can be extended or shortened if more or less port definitions are required for a device. For example, a device with four RapidIO ports is only required to use register map space corresponding to offsets [EF_PTR +0×00] through [EF_PTR +0×B8]. Register map offset [EF_PTR +0×C0] can be used for another extended features block.

B.1.2. Command and Status Registers (CSRs)

Refer to Table B.1 for the required behavior for accesses to reserved registers and register bits.

Table B.2. Serial physical layer register map: generic end point device

Block byte offset	Register name (word 0)	Register name (word 1)
0×0	1×/4× LP-Serial port maintenance block header
0×8–18	Reserved
0×20	Port link time-out control CSR	Port response time-out control CSR
0×28	Reserved
0×30	Reserved
0×38	Reserved	Port general control CSR
0×40	Reserved
0×48	Reserved
0×50	Reserved
0×58	Port 0 error and status CSR	Port 0 control CSR
0×60	Reserved
0×68	Reserved
0×70	Reserved
0×78	Port 1 error and status CSR