Real World Multicore Embedded Systems

Chapter 13

Hardware Accelerators

Bryon Moyer^a and Yosinori Watanabe^b, ^aTechnology Writer and Editor, EE Journal, ^bSenior Architect, Cadence Design Systems, Berkeley, CA, USA

Chapter Outline

Introduction

Architectural considerations

Blocking vs. non-blocking

Shared or dedicated

SMP vs. AMP

Copying data – or not

Signaling completion

The interface: registers, drivers, APIs, and ISRs

Hardware interface

Drivers

Software API

ISRs

Initialization

Operating system considerations

Coherency

Making the architectural decisions

Video example

The interface

The application

The driver

Real-world refinements

Chaining accelerators

Smaller data granularity

DMA

Burying the functions in a DMA copy operation

Summary

Introduction

In the endless pursuit of more and ...