September 2011
Intermediate to advanced
960 pages
25h 22m
English
Our study of integer-N synthesizers in Chapter 10 points to a fundamental shortcoming of these architectures: the output channel spacing is equal to the reference frequency, limiting the loop bandwidth, settling speed, and the extent to which the VCO phase noise can be suppressed. “Fractional-N” architectures permit a fractional relation between the channel spacing and the reference frequency, relaxing the above limitations.
This chapter deals with the analysis and design of fractional-N synthesizers (FNS’s). The chapter outline is shown below.

A PLL containing a ÷N circuit in the feedback ...
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