RISC-V Assembly Language Programming: Unlock the Power of the RISC-V Instruction Set

© The Author(s), under exclusive license to APress Media, LLC, part of Springer Nature 2024

S. SmithRISC-V Assembly Language ProgrammingMaker Innovations Serieshttps://doi.org/10.1007/979-8-8688-0137-2_5

5. Thanks for the Memories

Stephen Smith¹  

(1)

Gibsons, BC, Canada

 

In this chapter, we put data to and from RISC-V-based computer’s memory. So far, we’ve used memory to hold Assembly Language instructions, now we will learn how to define data in memory, to load memory into registers for processing, and to write the results back to memory.

The RISC-V processor uses a load-store architecture. This means that the instruction set is divided into two categories: one to load and store values from and to memory and the other to perform arithmetic and logical ...