Book description
See MIPS Run, Second Edition, is not only a thorough update of the first edition, it is also a marriage of the best-known RISC architecture--MIPS--with the best-known open-source OS--Linux. The first part of the book begins with MIPS design principles and then describes the MIPS instruction set and programmers’ resources. It uses the MIPS32 standard as a baseline (the 1st edition used the R3000) from which to compare all other versions of the architecture and assumes that MIPS64 is the main option. The second part is a significant change from the first edition. It provides concrete examples of operating system low level code, by using Linux as the example operating system. It describes how Linux is built on the foundations the MIPS hardware provides and summarizes the Linux application environment, describing the libraries, kernel device-drivers and CPU-specific code. It then digs deep into application code and library support, protection and memory management, interrupts in the Linux kernel and multiprocessor Linux.
Sweetman has revised his best-selling MIPS bible for MIPS programmers, embedded systems designers, developers and programmers, who need an in-depth understanding of the MIPS architecture and specific guidance for writing software for MIPS-based systems, which are increasingly Linux-based.
- Completely new material offers the best explanation available on how Linux runs on real hardware
- Provides a complete, updated and easy-to-use guide to the MIPS instruction set using the MIPS32 standard as the baseline architecture with the MIPS64 as the main option
- Retains the same engaging writing style that made the first edition so readable, reflecting the authors 20+ years experience in designing systems based on the MIPS architecture
Table of contents
- Cover
- Title Page
- Copyright
- Foreword
- Preface
- Table of Contents
- Chapter 1: RISCs and MIPS Architectures
-
Chapter 2: MIPS Architecture
- 2.1 A Flavor of MIPS Assembly Language
- 2.2 Registers
- 2.3 Integer Multiply Unit and Registers
- 2.4 Loading and Storing: Addressing Modes
- 2.5 Data Types in Memory and Registers
- 2.6 Synthesized Instructions in Assembly Language
- 2.7 MIPS I to MIPS64 ISAs: 64-Bit (and Other) Extensions
- 2.8 Basic Address Space
- 2.9 Pipeline Visibility
- Chapter 3: Coprocessor 0: MIPS Processor Control
-
Chapter 4: How Caches Work on MIPS Processors
- 4.1 Caches and Cache Management
- 4.2 How Caches Work
- 4.3 Write-Through Caches in Early MIPS CPUs
- 4.4 Write-Back Caches in MIPS CPUs
- 4.5 Other Choices in Cache Design
- 4.6 Managing Caches
- 4.7 L2 and L3 Caches
- 4.8 Cache Configurations for MIPS CPUs
- 4.9 Programming MIPS32/64 Caches
- 4.10 Cache Efficiency
- 4.11 Reorganizing Software to Influence Cache Efficiency
- 4.12 Cache Aliases
- Chapter 5: Exceptions, Interrupts, and Initialization
- Chapter 6: Low-level Memory Management and the TLB
-
Chapter 7: Floating-Point Support
- 7.1 A Basic Description of Floating Point
- 7.2 The IEEE 754 Standard and Its Background
- 7.3 How IEEE Floating-Point Numbers Are Stored
- 7.4 MIPS Implementation of IEEE 754
- 7.5 Floating-Point Registers
- 7.6 Floating-Point Exceptions/Interrupts
- 7.7 Floating-Point Control: The Control/Status Register
- 7.8 Floating-Point Implementation Register
- 7.9 Guide to FP Instructions
- 7.10 Paired-Single Floating-Point Instructions and the MIPS-3D ASE
- 7.11 Instruction Timing Requirements
- 7.12 Instruction Timing for Speed
- 7.13 Initialization and Enabling on Demand
- 7.14 Floating-Point Emulation
- Chapter 8: Complete Guide to the MIPS Instruction Set
- Chapter 9: Reading MIPS Assembly Language
- Chapter 10: Porting Software to the MIPS Architecture
- Chapter 11: MIPS Software Standards (ABIs)
- Chapter 12: Debugging MIPS Designs—Debug and Profiling Features
- Chapter 13: GNU/Linux from Eight Miles High
- Chapter 14: How Hardware and Software Work Together
- Chapter 15: MIPS Specific Issues in the Linux Kernel
- Chapter 16: Linux Application Code, PIC, and Libraries
- Appendix A: MIPS Multithreading
- Appendix B: Other Optional Extensions to the MIPS Instruction Set
- MIPS Glossary
- References
- Index
Product information
- Title: See MIPS Run, 2nd Edition
- Author(s):
- Release date: July 2010
- Publisher(s): Morgan Kaufmann
- ISBN: 9780080525235
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