Understanding variability in complementary metal oxide semiconductor (CMOS) devices manufactured using silicon-on-insulator (SOI) technology

S. Markov,    The University of Hong Kong, HK-SAR China,

B. Cheng and A.S.M. Zain,    University of Glasgow, UK

A. Asenov,    University of Glasgow and Gold Standard Simulations Ltd, UK


Statistical variability in ultra-scaled CMOS devices is a major challenge faced by the semiconductor industry today. It has critical impact on functionality and yield, particularly of static random access memory (SRAM) circuits. This chapter focuses on the physical origins of statistical variability and their manifestation in fully depleted (FD) thin-body silicon-on-insulator (TB-SOI) transistors. We first review the ...

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