SPARC CPU Cache Architectures

Since the hardware details vary from one machine implementation to another and the details are sometimes hard to obtain, the cache architectures of some common machines are described below, divided into four main groups: virtually and physically addressed caches with write-back algorithms, virtual write-through caches, and on-chip caches. For more details of the hardware implementation of older systems, read Multiprocessor System Architectures, by Ben Catanzaro (SunSoft Press). For up-to-date information on SPARC, detailed datasheets and white papers are available from Sun Microelectronics via

Virtual Write-through Caches

Most older desktop SPARCstations from Sun and the deskside SPARC ...

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