N. Rescher, Choice without preference: A study of the logic and the history of the problem of Buridan's Ass, Kant-Studien, 1959/60, No. 51, pp 142–175.
 S. Lubkin, Asynchronous signals in digital computers, Discussion, Proc ACM, 1952, pp 238–241.
 I. Catt, Time loss through gating of asynchronous logic pulses, IEE Trans., 1966, EC15, 108–111.
 T.J. Chaney and C.E. Molnar, Anomalous behavior of synchronizer and arbiter circuits, IEEE Transactions on Computers, C-22(4), 412–422, April 1973.
 D.J. Kinniment and D.B.G. Edwards, Circuit Technology in a large computer System, Proc. conference on Computers-Systems and Technology London, October 1972, pp 441–449.
 D.J. Kinniment and J.V. Woods, Synchronization and arbitration circuits in digital systems, Proc. IEE 123(10), 961–966, October 1976.
 H.J.M. Veendrick, The behavior of flip-flops used as synchronizers and prediction of their failure rate, IEEE Journal of Solid-State Circuits, SC-15(2), 169–176, April 1980.
 K.O. Jeppson, Comments on the Metastable Behavior of Mismatched CMOS Latches, IEEE Journal of Solid State Circuits 31(2) 275–277, February 1996.
 C.L. Seitz, Ideas about arbiters, Lambda, 1 (first quarter):10–14, 1980.
 C. Dike and E. Burton, Miller and Noise Effects in a Synchronizing Flip-Flop IEEE Journal of Solid State Circuits, 34(6), 849–855, June 1999.
 N.H.E. Weste, and K Eshraghian, Principles of CMOS VLSI design: A systems perspective, 2nd edn, Addison-Wesley, 1992, ...