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Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems
book

Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems

by Jean-Pierre Deschamps, Gery J.A. Bioul, Gustavo D. Sutter
March 2006
Intermediate to advanced
576 pages
11h 43m
English
Wiley-Interscience
Content preview from Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems

16.2 ARITHMETIC OPERATIONS

First analyze the main arithmetic operations and generate the corresponding computation algorithms.

16.2.1 Addition of Positive Numbers

Given two positive floating-point numbers s1.Be1 and s2.Be2 their sum s.Be is computed as follows.

Assume that e1 is greater than or equal to e2; then (alignment) the sum of s1.Be1 and s2.Be2 can be expressed in the form s.Be, where

image

The value of s belongs to the interval

image

so that s could be greater than or equal to B. If it is the case, that is, if

image

then (normalization) substitute s by s/B, and e by e + 1, so that the value of s.Be is the same as before, and the new value of s satisfies

image

The significands s1 and s2 of the operands are multiples of ulp. If e1 is greater than e2, the value of s could no longer be a multiple of ulp and some rounding function should be applied to s. Assume that

image

s′ and s″ being two successive multiples of ulp. Then the rounding function associates to s either s′ or s″, according to some rounding strategy. ...

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ISBN: 9780471687832Purchase book