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Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems
book

Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems

by Jean-Pierre Deschamps, Gery J.A. Bioul, Gustavo D. Sutter
March 2006
Intermediate to advanced
576 pages
11h 43m
English
Wiley-Interscience
Content preview from Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems

5.2 INTEGERS

Conceptually, the simplest method for multiplying signed integers consists in computing, from the representations of the operands X and Y, the corresponding absolute value of the product together with the appropriate sign. The absolute value of the product would be obtained by one of the methods described before, while the product sign would be readily given through the exclusive OR function applied to a suitable binary representation of the respective signs. The process would then be completed by the computation of the signed representation of the result. This method is appropriate whenever the operands are provided in sign-magnitude form. In this case, signed multiplication appears trivial. In the case of B's complement or signed-digit representations, other methods have to be recommended.

5.2.1 B's Complement Multiplication

Let X and Y be two integers represented in the reduced B's complement numeration system (Chapter 3, Comment 3.2):

image

xn−1 and ym−1 are called sign-digits (sign-bits for B = 2). The respective weights of X and Y can be positive or negative according to the following definitions.

X and Y can be expressed in the form

image

where image = 0 if xn−1 = 0 and = −1 if ...

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