System-Level Design with Rosetta

Chapter 18. Power-Aware Design

The first power-aware design study examines Rosetta’s capabilities for transforming and composing models to examine power trade-offs with respect to implementation technologies. The challenge is to determine whether it is best for a component from a TDMA receiver to be implemented in software, an FPGA, or an application-specific integrated circuit (ASIC) before prototyping the component. The approach chosen uses an activity-based power estimation model and simulation to determine activity in the component. The power model is specialized for each implementation technology using a refinement on a basic, abstract power model. The functional model is specialized similarly, changing the activity estimation based on the ...