O'Reilly logo

The Definitive Guide to ARM® Cortex®-M0 and Cortex-M0+ Processors, 2nd Edition by Joseph Yiu

Stay ahead with the world's most comprehensive technology and business learning platform.

With Safari, you learn the way you learn best. Get unlimited access to videos, live online training, learning paths, books, tutorials, and more.

Start Free Trial

No credit card required

Appendix B

Exception Type Quick Reference

B.1. Exception Types

The exception types and corresponding control registers are listed in Table B.1:

Table B.1

Exception types and associated enable control registers

Exception typeNamePriority (word address)Enable
1Reset3Always
2NMI2Always
3HardFault1Always
11SVCallProgrammable (0xE000ED1C, byte 3)Always
14PendSVProgrammable (0xE000ED20, byte 2)Always
15SYSTICKProgrammable (0xE000ED20, byte 3)SYSTICK Control and Status Register (SysTick->CTRL)
16Interrupt #0Programmable (0xE000E400, byte 0)NVIC SETENA0(0xE000E100, bit 0)
17Interrupt #1Programmable (0xE000E400, byte 1)NVIC SETENA0(0xE000E100, bit 1)
18Interrupt #2Programmable (0xE000E400, byte 2)NVIC SETENA0(0xE000E100, bit 2)
19Interrupt #3Programmable (0xE000E400, ...

With Safari, you learn the way you learn best. Get unlimited access to videos, live online training, learning paths, books, interactive tutorials, and more.

Start Free Trial

No credit card required