The Definitive Guide to the ARM Cortex-M3

CHAPTER 2 Overview of the Cortex-M3

In This Chapter:

• Fundamentals

• Registers

• Operation Modes

• The Built-In Nested Vectored Interrupt Controller

• The Memory Map

• The Bus Interface

• The Memory Protection Unit

• The Instruction Set

• Interrupts and Exceptions

• Debugging Support

• Characteristics Summary

Fundamentals

The Cortex-M3 is a 32-bit microprocessor. It has a 32-bit data path, a 32-bit register bank, and 32-bit memory interfaces. The processor has a Harvard architecture, which means it has a separate instruction bus and data bus. This allows instructions and data accesses to take place at the same time, and as a result of this the processor performance increases because data accesses do not affect the instruction pipeline. This ...