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The Designer's Guide to the Cortex-M Processor Family, 2nd Edition by Trevor Martin

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Chapter 7

Debugging with CoreSight

Abstract

The Cortex-M processor family includes a debug architecture called CoreSight. This chapter examines the software and hardware requirements to use CoreSight. The chapter continues to detail the advanced data and instruction trace features included within the CoreSight system.

Keywords

CoreSight; JTAG; embedded trace macrocell (ETM); instrumentation trace (ITM); debug adapter; Ulink; Jlink; Micro Trace Buffer

Many developers who start work with a Cortex-M microcontroller assume that its debug system is a form of “JTAG (Joint Test Action Group)” interface. In fact a Cortex-M processor has a debug architecture called “CoreSight” which is considerably more powerful. In addition to the run control and memory access ...

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