Chapter 8

Debugging With CoreSight

Abstract

The Cortex-M processor family includes a debug architecture called Coresight. This chapter examines the software and hardware requirements to use Coresight. This chapter will also cover the many advanced features provided by a typical Cortex-M Coresight implementation.

Keywords

Coresight; JTAG; Embedded Trace Macrocell; ETM; Instrumentation Trace; ITM; Debug Adapter; Ulink; Jlink; Micro Trace Buffer; Component viewer; Event viewer; Power analysis

Introduction

Many developers who start work with a Cortex-M microcontroller assume that its debug system is a form of “JTAG” interface. In fact, a Cortex-M processor has a debug architecture called “CoreSight,” which is considerably more powerful. In addition to ...

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