5

Trends in Low-Power VLSI Design

Tarek Darwish and Magdy Bayoumi,     The Center for Advanced Computer Studies, University of Louisiana at Lafayette, Lafayette, Louisiana, USA

5.1. Introduction

5.2. Importance of Low-Power CMOS Design

5.3. Sources of Power Consumption in CMOS

5.3.1. Dynamic Power Dissipation

5.3.2. Short Circuit Power Dissipation

5.3.3. Static Power Dissipation

5.4. Power Consumption Considerations

5.4.1. Supply Voltage Level

5.4.2. Device Threshold Voltage

5.4.3. Physical Capacitance

5.4.4. Switching Frequency

5.5. Energy Versus Power

5.6. Optimization Metrics

5.7. Techniques for Power Reduction

5.7.1. System Level

5.7.2. Architectural Level

5.7.3. Logic Gate Level

5.7.4. Circuit Level

5.7.5. Physical Level ...

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