This chapter covers techniques that can be useful when debugging makefiles. The lack of built-in debugging tools, and the complexities of following variables in
make, can make it very challenging to understand why a particular target was (or more often was not) built.
The first recipe in this chapter shows the single most useful line that you can add to a makefile; it’s the equivalent of a print statement inserted into code for debugging.
If you’ve ever looked in a makefile, you’ll realize that makefile variables (often just called variables) form the backbone of any
make process. Variables often define which files will be compiled, what command line parameters to pass to compilers, ...