The System Designer's Guide to VHDL-AMS

appendix F

Answers to Exercises

In this appendix, we provide sample answers to the quiz-style exercises marked with the symbol “”. Readers are encouraged to test their answers to the other, more involved, exercises by running the models on a VHDL simulator.

Chapter 1

1. Entity declaration: defines the interface to a module, in terms of its ports, their data transfer direction and their types. Behavioral architecture body: defines the function of a module in terms of an algorithm. Structural architecture body: defines an implementation of a module in terms of an interconnected composition of sub-modules. Process statement: encapsulates an algorithm ...