Real Mode Interrupt/Exception Handling
The 8088/8086 processor did not have an IDT register (Interrupt Descriptor Table register), but all of the post 8088/8086 processors do. By definition, the 8088/8086 processor's Interrupt Table always started at location 00000h and was 03FFh in length (1KB; 256 entries of 4 bytes each), while the location and length of the Interrupt Table is programmable for the 286 and all subsequent IA32 processors.
Refer to Figure 5-30 on page 94. In the IA32 processors, the assertion of reset at powerup presets the IDTR with an IDT base address of 00000000h and a table length of FFFFh (64KB, the lower 1KB of which consists of 256 entries of four bytes each). In Real Mode, the programmer can use the LIDT (Load IDT Register) ...
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