The Cache's Purpose

Without a Cache, Core Stalls Were Common

When an IA32 processor prior to the 486 had to perform a memory access (i.e., an instruction fetch, a memory data read, or a memory data write), the processor had to arbitrate for ownership of its FSB in order to perform the memory read or write on the FSB. The processor core's ability to continue program execution (and therefore its performance) was affected as follows:

  • If the processor was performing a memory code read to prefetch the next instruction from memory, it could affect the processor's ability to continue with program execution. The earlier processors had a very shallow instruction prefetch buffer to supply instructions to the processor's execution unit. The processor core ...

Get The Unabridged Pentium 4 IA32 Processor Genealogy now with the O’Reilly learning platform.

O’Reilly members experience live online training, plus books, videos, and digital content from nearly 200 publishers.