A cache can be designed either as a Write-Through (WT) cache or as a Write Back (WB) cache. The following subsections provide a description of a WT cache's basic operation.
When a load is executed, the processor takes the following actions (this example assumes that the cache lookup results in a cache miss):
The load cannot be completed until the requested data has been obtained and placed in the specified target register.
The processor submits the start memory address specified by the load to the on-die cache for a lookup. This example assumes that the lookup results in a cache miss.
The cache forwards the load request upstream to the next level of memory. In an IA32 processor that only implemented ...