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The Unabridged Pentium 4 IA32 Processor Genealogy by Bob Colwell, Tom Shanley

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Instruction Set Changes

MMX Not Implemented

As noted earlier in this chapter (see “MMX Not Implemented” on page 572), the Pentium® Pro did not implement the MMX instruction set or register set.

New Instructions

The new instructions added to the instruction set are shown below and are described in the sections that follow:

  • CMOV (Conditional Move).

  • FCMOV (FP Conditional Move).

  • FCOMI (FP Compare and Set EFlags).

  • RDPMC (Read Performance Monitoring Counters).

  • UD2 (UnDefined).

Conditional Move (CMOV) Eliminates Branches
Problem It Addresses

Starting with the P6 processor family, the IA32 processors have a deep instruction pipeline and execute instructions out-of-order. For these reasons, mispredicted branch instructions can cause a fairly substantial decrease ...

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