The new instructions added to the instruction set are shown below and are described in the sections that follow:
CMOV (Conditional Move).
FCMOV (FP Conditional Move).
FCOMI (FP Compare and Set EFlags).
RDPMC (Read Performance Monitoring Counters).
Starting with the P6 processor family, the IA32 processors have a deep instruction pipeline and execute instructions out-of-order. For these reasons, mispredicted branch instructions can cause a fairly substantial decrease ...