PSE-36 Mode

PSE-36 Mode Background

Only one new software feature was introduced in the Pentium® II Xeon processor. This is the PSE-36 feature and it is described in the sections that follow.

Prior to the introduction of PAE-36 Mode (see “PAE-36 Mode” on page 554) in the Pentium® Pro processor, IA32 processors could only address up to 4GB of physical memory (refer to Figure 29-3 on page 732). Using a 3-level directory lookup (rather than the 2-level, 386-compatible Paging mechanism), PAE-36 Mode permitted the OS to map a 32-bit linear memory address to any address within the processor's 64GB physical memory address space. However, implementing PAE-36 Mode necessitated a rewrite of the paging portion of the OS kernel to use the 3-level directory ...

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