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The Unabridged Pentium 4 IA32 Processor Genealogy by Bob Colwell, Tom Shanley

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The L3 Cache

Introduction

High-end Pentium® 4-based products (all Xeon MPs, later model Xeon DPs, Pentium® 4 Extreme Edition) incorporate an on-die L3 Cache. It has the following major characteristics:

  • It is a unified cache (i.e., it caches both code and data and does not discriminate between the two).

  • It is physically-addressed and physically-tagged.

  • 512KB, 1MB, 2MB or 4MB in size.

  • It is an 8-way set-associative cache.

  • It is a Write-Back (MESI) cache.

  • The cache line size is 128 bytes, with each line divided into 64 byte sectors.

  • It is a non-blocking cache.

  • It can cache from the full 64GB physical memory space.

  • ECC-protected. It can detect and correct single-bit failures and detect (but not correct) multi-bit failures.

The L3 Cache's Client

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