The Debug Store (DS) Mechanism
Introduction
If enabled, the Debug Store mechanism permits the processor to automatically store branch (Branch Trace Store, or BTS) and PEBS records in a memory buffer referred to as the DS save area.
A detailed description of the PEBS feature can be found in “Precise Event-Based Sampling” on page 1414.
The DS mechanism is available in Real Mode.
Feature Detection
The programmer can determine if a processor supports the DS feature by executing a CPUID request type 1 and verifying that EDX[21] =1. Assuming that the bit is set to one, the programmer must also check the following two bits:
IA32_MISC_Enable[12] (see Figure 56-21 on page 1373) indicates whether or not a processor supports the PEBS feature.
IA32_MISC_Enable[11] ...
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