Three-Dimensional Integrated Circuit Design, 2nd Edition

Appendix C

Proof of the Two-Terminal Via Placement Heuristic

A formal proof of the two terminal heuristic for placing intertier vias (e.g., TSVs) is described in this appendix. Consider the following expression that describes the critical point (i.e., the derivative of the delay is set equal to zero) for placing a via v_j, as illustrated in Fig. C.1,

$x_j^{*}=-\left[\frac{l_{vj}\left(r_j{c}_{vj}-r_{vj}{c}_{j+1}+r_{j+1}{c}_{j+1}-r_j{c}_{j+1}\right)+R_{uj}\left(c_j-c_{j+1}\right)+\mathrm{\Delta }{x}_j\left(r_j-r_{j+1}\right)c_{j+1}+C_{dj}\left(r_j-r_{j+1}\right)}{r_j{c}_j-2r_j{c}_{j+1}+r_{j+1}{c}_{j+1}}\right].$ (C.1)

(C.1)

Figure C.1 Intertier interconnect consisting of m segments connecting two circuits ...