Book description
A Step-by-Step Guide to Verification of Digital Systems
This practical book provides a step-by-step, interactive introduction to formal verification of systems and circuits. The book offers theoretical background and introduces the application of three powerful verification toolsets: LOTOS-based CADP, Petri nets–based PETRIFY, and CCS-based CWB. The book covers verification of modular asynchronous circuits, alternating-bit protocols, arbiters, pipeline controllers, up-down counters, and phase converters, as well as many other verification examples.
Using the given detailed examples, exercises, and easy-to-follow tutorials, complete with the downloadable toolsets available via referenced Web sites, this book serves as an ideal text in advanced undergraduate and graduate courses in computer science and electrical engineering. It is also valuable as a desktop reference for practicing verification engineers who are interested in verifying that designed digital systems meet specifications and requirements.
Table of contents
- Cover Page
- Title Page
- Copyright
- Dedication
- Contents
- CHAPTER 1: Introduction
-
CHAPTER 2: Processes
- 2.1 INTRODUCTION
- 2.2 EXAMPLES OF PROCESSES AND BASIC CONCEPTS
- 2.3 ABOUT PREFIXING
- 2.4 PROCESS GRAPHS
- 2.5 CHOICE OPERATOR
- 2.6 ANOTHER PROCESS EXAMPLE
- 2.7 EQUIVALENCES
- 2.8 LABELED TRANSITION SYSTEMS (LTSs)
- 2.9 PARALLEL OPERATORS
- 2.10 SEQUENTIAL COMPOSITION
- 2.11 FURTHER READING
- 2.12 SELECTED SOLUTIONS
- 2.13 REFERENCES
- CHAPTER 3: From Digital Hardware to Processes
-
CHAPTER 4: Introducing LOTOS
- 4.1 FROM BLOT TO BASIC LOTOS
- 4.2 SOME SEMANTICS
- 4.3 FROM LTS TO LOTOS
- 4.4 COMPARING PARALLEL OPERATORS
- 4.5 SEQUENTIAL COMPOSITION
- 4.6 HIDING
- 4.7 EQUIVALENCES AND PREORDERS
- 4.8 ABOUT CADP
- 4.9 FULL LOTOS—AN INTRODUCTION
- 4.10 THE REGULAR MU-CALCULUS (RMC)
- 4.11 FURTHER READING
- 4.12 SELECTED SOLUTIONS
- 4.13 REFERENCES
-
CHAPTER 5: Introducing Petri Nets
- 5.1 ABOUT PETRI NETS
- 5.2 ABOUT LANGUAGES
- 5.3 ABOUT PETRIFY
- 5.4 ILLUSTRATING PETRI NETS
- 5.5 LABELED NETS
- 5.6 BOUNDED NETS
- 5.7 OBSERVATION EQUIVALENCE OF LPNS
- 5.8 FROM BLOT TO PETRI NETS
- 5.9 LIVENESS AND PERSISTENCE
- 5.10 SIMPLE REDUCTION RULES
- 5.11 MARKED GRAPHS
- 5.12 A SIMPLE NET ALGEBRA
- 5.13 ARC-WEIGHTED NETS
- 5.14 READERS–WRITERS SYSTEM
- 5.15 INHIBITOR NETS
- 5.16 TRUE CONCURRENCY
- 5.17 FURTHER READING
- 5.18 SELECTED SOLUTIONS
- 5.19 REFERENCES
- CAHPTER 6: Introducing CCS
- CHAPTER 7: Verification of Modular Asynchronous Circuits
- CHAPTER 8: Verification of Communication Protocols
- CHAPTER 9: Verification of Arbiters
-
CHAPTER 10: More Verification Case Studies
- 10.1 VERIFICATION OF COMBINATIONAL LOGIC
- 10.2 VERIFICATION OF ASYNCHRONOUS PIPELINE CONTROLLERS
- 10.3 VERIFICATION OF PRODUCER–CONSUMER SYSTEMS
- 10.4 VERIFICATION BASED ON DESIGN APPROACHES
- 10.5 VERIFICATION OF TOGGLES AND TRANSITION COUNTERS
- 10.6 VENDING MACHINES VERIFICATION—REVISITED
- 10.7 PI-REALIZATIONS
- 10.8 A COMPARISON OF EQUIVALENCE RELATIONS
- 10.9 SELECTED SOLUTIONS
- 10.10 REFERENCES
- CHAPTER 11: Guide to Further Studies
- INDEX
Product information
- Title: Verification of Systems and Circuits Using LOTOS, Petri Nets, and CCS
- Author(s):
- Release date: March 2008
- Publisher(s): Wiley-Interscience
- ISBN: 9780471704492
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