• adaptive block redundancy. see also single crystal silicon stacked
  • ALD - atomic layer deposition
  • array efficiency
  • Arrhenius Curve
  • a-Si (amorphous silicon)
  • asperities (silicon protrusions). see flash memory
  • AXI (advanced extensible interface)


  • backtunneling
  • band diagram (diagram plotting electron energy levels vs. a spatial dimension)
  • bandgap engineer (BE)
  • BE. see bandgap engineer
  • BEOL (back end of the line)
  • BiCS (bit cost scalable). see vertical channel NAND
  • bipolar switching. see also ReRAM
    • with selector
    • selectorless
  • BISR (built in self repair)
  • BIST (built in self test)
  • bit-line decode. see also SSL decode
  • blocking layer
  • butterfly curves. see also SNM


  • CAD (computer automated design)
  • carbon nanotube (CNT)
  • chalcogenide. see also Phase Change Memory (PCM)
  • Charge trapping (CT). see also SONOS
    • charge spreading
    • EAROM (see MNOS)
    • MNOS
    • SONONS
    • SONS
  • CHEI (channel hot electron injection)
  • CMOS (Complementary Metal Oxide Silicon)
  • CMP (chemical mechanical planarization)
  • CMS. see complementary resistive switching
  • CNT. see carbon nanotube
  • complementary resistive switching (CRS)
  • compliance current. see ReRAM
  • Conductive Bridge RAM (CB-RAM)
  • conductive filament. see ReRAM
  • copper pumping. see also TSV Proximity effects
  • coupling ratio
  • cross-bar array. see cross-point array
  • cross-point array
    • horizontal
    • non-linear effect
    • parasitic conducting paths
    • parasitic resistance
    • passive
    • selectorless
    • self rectifying
    • vertical
  • crystal orientation
  • CT. see charge trapping ...

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