CHAPTER 2

Behavioral Modeling

In Chapter 1, we discussed different modeling techniques and touched briefly on behavioral modeling. In this chapter, we discuss behavioral modeling more thoroughly, as well as some of the issues relating to the simulation and synthesis of VHDL models.

Image Introduction to Behavioral Modeling

The signal assignment statement is the most basic form of behavioral modeling in VHDL. Following is an example:

Image

This statement is read as follows: a gets the value of b. The effect of this statement is that the current value of signal ...

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