VHDL

8

Configurations and Packages

CHAPTER OBJECTIVES

• Concept of configurations and their significance
• Using configuration for entity–architecture binding
• Using configuration for entity–component binding
• Learning about packages and their use
• Concept of deferred constants

8.1 INTRODUCTION TO CONFIGURATIONS

Configurations are advanced concepts introduced in VHDL which extends the flexibility and usability of VHDL language. Though it is not a simulation concept it provides the late binding capability to VHDL by associating an entity with multiple architecture views and binding an entity–architecture pair at run time as specified by the user. As the name suggests it configures at the execution or simulation time the binding between entity and ...