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VLSI Design Methodology Development, First Edition
book

VLSI Design Methodology Development, First Edition

by Thomas Dillinger
June 2019
Intermediate to advanced content levelIntermediate to advanced
752 pages
22h 19m
English
Pearson
Content preview from VLSI Design Methodology Development, First Edition

Chapter 13. Power Analysis

13.1 Introduction to Power Analysis

The power analysis flow calculates (estimates of) the active and static leakage power dissipation of the SoC design. This electrical analysis step utilizes the detailed extraction model of the block and global SoC layouts. The active power estimates are dependent on the availability of switching factors for all signals in the cell netlist. Representative simulation testcases are applied to the netlist model, and the signal value change data are recorded.

The output data from the power analysis flow guide the following SoC tapeout release assessments:

  • Total SoC power specification (average and standby leakage)—The specification for SoC power is critical for package selection and ...

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Publisher Resources

ISBN: 9780135657645