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VLSI Digital Signal Processing Systems: Design and Implementation
book

VLSI Digital Signal Processing Systems: Design and Implementation

by Keshab K. Parhi
January 1999
Intermediate to advanced
808 pages
19h 21m
English
Wiley-Interscience
Content preview from VLSI Digital Signal Processing Systems: Design and Implementation

6.5    FOLDING OF MULTIRATE SYSTEMS

Multirate DSP algorithm descriptions contain decimators and/or expanders (see Section 1.2.9). Fig. 6.20 shows a decimator and an expander. The decimator obeys the input-output relationship yD(n) = x(Mn), and the expander obeys the input-output relationship

image

The decimator throws away (M − 1) out of M samples and the expander inserts (M − 1) zero-samples between 2 nonzero samples. The decimator and the expander both have the effect of changing the sample rate.

The folding equation for an edge that contains no decimators or expanders is given in (6.1). Folding equations can also be derived for an edge that contains a decimator or an expander [9]. In this section we derive the equation for edges that contain a decimator; the case where an edge contains an expander is left as an exercise (see Problem 22).

Consider the edge UV in Fig. 6.21(a), where the output of the node U passes through w1 delays, decimation by M, and w2 delays before reaching the node V. Let the l-th iteration of the node U be executed at time unit NUl + u and the l-th iteration of V execute at NVl + v, where the folding orders u and v satisfy u ∈ [0, NU) and v ∈ [0, NV). The signals labeled in

Fig. 6.21(a) are related by

image

which implies that the sample y(l), which is consumed during ...

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ISBN: 9780471241867Purchase book