Wireless Transceiver Architecture

7 Transceiver Budgets

Having derived the minimum set of functionalities to be implemented in a transceiver in Part I of this book, as well as the degradations resulting from their physical implementations in Part II, we can now illustrate how to carry out the system design of a transceiver in order to fulfill a given set of requirements while taking into consideration the limitations in its physical implementation.

Two approaches can be followed. We can decide a priori on an architecture that is theoretically able to fulfill the different requirements we have for a transceiver. We can then carry out the budget of the line-up to refine the balance of the constraints between the different blocks of the line-up, and then check that we can achieve the desired performance. Alternatively, we can also imagine tuning the architecture itself in order to overcome the limitations of some constituent blocks that could prevent the achievement of some of the requirements.

In practice, these two approaches can be seen as the two sequences of an iterative process that leads to the optimization of the final implementation of a transceiver. However, for the sake of clarity we first illustrate how to budget a transceiver for a selected architecture. This is done in this chapter for the simplest architecture we can think of in order to carry out the signal processing required by most of the complex modulation schemes used in digital communications, i.e. the direct conversion scheme. Then, we can ...