Electronic Design Automation

3.5.2.1. Combinational compaction

A combinational compactor uses a combinational circuit to compact m outputs of the circuit under test into n test outputs, where n < m. If each output sequence contains only known (non-X) values (0′s and 1′s), then a combinational compactor that uses XOR gates with each internal scan chain output connected to only one XOR gate input is sufficient to guarantee no-fault coverage loss when the number of errors appearing at the m outputs is always odd [Saluja 1983]. A compactor that uses such XOR gates is referred to as a conventional combinational compactor or simple space compactor. An example is illustrated in Figure 3.46 [Wang 2008]. On the contrary, if any output sequence contains unknown values (X's), the ...