book

Embedded Systems and Computer Architecture

by Graham R Wilson

December 2001

Intermediate to advanced

320 pages

7h 37m

English

Newnes

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1.1 Numbers within a computing machine1.2 Adding binary integers1.3 Representing signed integers1.4 Addition and subtraction of signed integers1.5 Two’s complement theory*1.6 Use of hexadecimal representation1.7 Problems
2.1 Logic – the bank vault2.2 Evaluating the logic expression for the bank vault2.3 Another solution2.4 Simplifying logical expressions*2.5 Rules for simplifying logical expressions using a map*2.6 Karnaugh-Veitch program, KVMap*2.7 Quine–McCluskey method*2.8 Problems
3.1 Electronic controller3.2 Development of the bank vault controller design3.3 Gates – electronic circuits that perform logical operations3.4 Decoder circuit3.5 Multiplexer circuit3.6 Flip-flops3.7 Storage registers3.8 State machines*3.9 Programmable logic devices*3.10 Problems

4.1 Circuit to add numbers4.2 Adder/Subtractor4.3 Arithmetic and logic unit4.4 Shifting data4.4 Fast adders*4.5 Floating-point numbers*4.6 Problems
5.1 A manual computing system5.2 Storing data and program instructions5.3 Connecting the machine components5.4 Architecture of Simple Machine5.5 More general view of the design of Simple Machine*5.6 Improvements to Simple Machine5.7 Architecture of the G80 microprocessor5.8 Problems
6.1 Programmer’s model6.2 Instruction format and addressing modes6.3 Converting the source code to machine code – manual assembly6.4 Using the assembler6.5 Assembly language6.6 Types of instruction6.7 Problems
7.1 Program control structures7.2 Data structures7.3 Subroutines7.4 Problems
8.1 G80 external connections8.2 Read-only memory device – ROM8.3 COMPI computer – G80 with ROM only8.4 RAM device8.5 COMP2 computer – G80 with ROM and RAM8.6 COMP3 computer8.7 Microprocessor control signals8.8 Problems
9.1 Simple output port9.2 Port address space9.3 A simple input port9.4 Programmable ports*9.5 Serial data transmission – UART*9.6 Problems
10.1 Simple input and output10.2 Handshaking10.3 Simple output to a slow device10.4 Do-forever loop10.5 Processor interrupt10.6 Possible interrupt mechanisms10.7 Interrupt priority mechanisms10.8 Non-maskable interrupt10.9 G80 interrupt mechanisms10.10 Direct memory access10.11 Problems
11.1 Counter device and its use in a conveyor belt11.2 Timer device11.3 Calendar device11.4 Pottery kiln11.5 Multitasking*11.6 Problems
12.1 How an assembler works12.2 Linker12.3 Intel format file12.4 High-level languages12.5 Problems
13.1 Requirements of the control unit13.2 Register transfers13.3 Instruction fetch13.4 Examples of instruction execution13.5 Hardwired controller13.6 More about the hardwired controller13.7 Microprogrammed control13.8 Problems
14.1 General-purpose computers14.2 Memory bottleneck14.3 Storage within a computer14.4 Data bus width and memory address space14.5 Addressing modes14.6 Organization of 32-bit memory14.7 Instruction queue14.8 Locality of reference14.9 Operating systems
15.1 Basic operation of cache15.2 Cache organization – direct mapping15.3 Cache organization – set-associative mapping15.4 Cache organization – fully associative mapping15.5 Problems
16.1 Virtual and physical addresses – imaginary and real memory16.2 Pages and page frames16.3 Page Tables16.4 Handling a page fault16.5 Page size16.6 Two-level paging*16.7 Translation look-aside buffer16.8 Memory protection16.9 Problems

Content preview from Embedded Systems and Computer Architecture

Computer arithmetic

A result of our choosing to represent numbers in binary notation is that we can devise logic circuits to process the numbers. In this chapter, we design a simple adder circuit and develop it into a more useful ALU (arithmetic and logic unit). We see how the simple adder can be made to operate faster by using the carry-look-ahead technique. Finally, we look at how floating-point numbers are represented and how arithmetic is performed on them.

4.1 Circuit to add numbers

We wish to construct a circuit that will form the sum of two 4-bit numbers. Let these numbers be A = = <A₃ A₂ A₁ A₀> and T = = <T₃ T₂ T₁ T₀> while the sum of A and T is S = = <S₄ S₀ S₂ S₁ S₀>.