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Field-Programmable Gate Arrays: Reconfigurable Logic for Rapid Prototyping and Implementation of Digital Systems
book

Field-Programmable Gate Arrays: Reconfigurable Logic for Rapid Prototyping and Implementation of Digital Systems

by John V. Oldfield, Richard C. Dorf
January 1995
Intermediate to advanced
360 pages
9h
English
Wiley-Interscience
Content preview from Field-Programmable Gate Arrays: Reconfigurable Logic for Rapid Prototyping and Implementation of Digital Systems

2.2   SEQUENTIAL CIRCUITS

Combinational logic produces outputs that are strictly functions of the inputs. But many computations and digital systems require the storage and reuse of information as part of a sequence of operations. The behavior of a sequential circuit depends on its initial state and the sequence of inputs it has experienced. Sequential circuits have state memory as well as combinational logic. For the most part, we only consider synchronous sequential circuit examples, that is, in which they are clocked by a regular clock, and whose inputs must be stable at the time of a clock edge transition. This method or discipline is much easier to implement and check out in practice, but we must be aware that externally applied signals may not always conform. We take up this point later in the chapter.

2.2.1   Latches and Flip-Flops

Sequential machines require memory to hold their current state. The latch is the most elementary form of memory, and is illustrated in Figure 2–2. If the CONTROL input is true, the output OUT becomes the same as input IN. If CONTROL goes false, OUT retains its previous value. This is often referred to as a transparent latch, because of the direct connection between input and output, and is level-sensitive. It is in fact a basic element in the Algotronix architecture, but limited in utility, because the transparency allows signals to pass through. If we take two latches in cascade, we can form an edge-triggered D-type flip-flop, as shown in Figure ...

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ISBN: 9780471556657Purchase book