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Field-Programmable Gate Arrays: Reconfigurable Logic for Rapid Prototyping and Implementation of Digital Systems
book

Field-Programmable Gate Arrays: Reconfigurable Logic for Rapid Prototyping and Implementation of Digital Systems

by John V. Oldfield, Richard C. Dorf
January 1995
Intermediate to advanced
360 pages
9h
English
Wiley-Interscience
Content preview from Field-Programmable Gate Arrays: Reconfigurable Logic for Rapid Prototyping and Implementation of Digital Systems

1.4   DESIGN STYLES

Returning to Figure 1–2, how can the design phase be addressed? The task, grossly simplified, is the creation of a circuit of abstract components that converts a specification to an implementation. Since we are concerned with digital systems, the specification is likely to be a formal or informal description of an algorithm. The interpretation of the algorithm effects some useful work on data. An algorithm can be thought of as a set of rules or a set of processing steps, for transforming data and executing a computation. The algorithm is a static description which needs to be interpreted by a machine to perform the work. The circuit of abstract components is this machine. So the design task begins by choosing a set of relevant elements, hardware and software, and interconnecting them. This process defines a systems architecture. Historically, there have been two generic architectural styles: the software paradigm based on the Von Neumann model of computation and the hardware paradigm. All design architectures, including those using FPGAs, fall into one of these two classes or are made up of elements that fall into these classes. Under the software paradigm, an algorithm is mapped into code that is interpreted by a processor. Figure 1–12 shows an outline of a Von Neumann engine, with a memory (M), various registers (memory address, memory data, program counter, etc.), and an arithmetic-logic unit. Under the hardware paradigm, an algorithm is mapped into storage ...

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Publisher Resources

ISBN: 9780471556657Purchase book