Chapter 8
Hardware Support for Synchronization
Contents
8.1.1 Evaluating the Performance of Lock Implementations
8.1.2 The Need for Atomic Instructions
8.1.4 Test andTest and Set Lock
8.1.5 LoadLinkedand Store ConditionalLock
8.1.7 Array-Based Queuing Lock
8.1.8 Qualitative Comparison of Lock Implementations
8.2.1 Sense-Reversing Centralized Barrier
8.2.3 Hardware BarrierImplementation
As we have discussed in Chapter 6, hardware support for building a shared memory multiprocessor system that guarantees correct and efficient execution of parallel programs ...
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