Chapter 11
Interconnection Network Architecture
Contents
11.1 Link, Channel, and Latency
11.3 Routing Policies and Algorithms
11.5 Case Study: Alpha 21364 Network Architecture
11.6.1 Contemporary Design Issues
So far our discussion has been centered on how to build a correct and efficient shared memory multiprocessor, by providing cache coherence, memory consistency, and synchronization primitives. We have assumed that messages are reliably sent from one processor to another with a low latency. However, we have not discussed how messages can be sent reliably and fast from one node to another.
The objective of this chapter is to discuss ...
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