Hardware Design Verification: Simulation and Formal Method-Based Approaches

Chapter 4. Test Bench Organization and Design

Chapter Highlights

• Anatomy of a test bench and a test environment

• Initialization mechanism

• Clock generation and synchronization

• Stimulus generation

• Response assessment

• Verification utility

• Test bench-to-design interface

• Common practical techniques and methodologies

Anatomy of a Test Bench and a Test Environment

To simulate a design, an external apparatus called a test bench is often required to mimic the environment in which the design will reside. Among other functionality, the main purpose of a test bench, written in HDL, is to supply input waveforms to the design and to monitor its response. Because a test bench is not manufactured as the design, it has far fewer coding style restrictions. Together with the ...