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Hardware Design Verification: Simulation and Formal Method-Based Approaches by William K. Lam

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Chapter 8. Decision Diagrams, Equivalence Checking, and Symbolic Simulation

A fundamental problem in formal verification is determining whether two Boolean functions are functionally equivalent. A case in point is to determine whether a circuit, after timing optimization, retains the same functionality. Logical equivalence can be done on either combinational functions or sequential functions. Determining even combinational equivalence can be hard, such as deciding whether Decision Diagrams, Equivalence Checking, and Symbolic Simulation is equivalent to . The second ...

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