High Performance Control of AC Drives with Matlab / Simulink Models

3.9 Dead Time Effect in a Multi-phase Inverter

This section further elaborates on the effect of introducing dead time (time lag between the switching ‘ON’ and switching ‘OFF’ of the two power semiconductor switches of the same leg of an inverter). The two power switches of the same leg should not be turned on simultaneously, in order to avoid the source side short circuit and uncontrolled flow of current through inverter switches and subsequent failure of the inverter; the time delay thus to be introduced between the turning on and turning off of the two switches of the same leg. The power semiconductor switch turn-on and turn-off time depend upon several factors, such as the power rating of the switch, the operating temperature, and gate drive current 62. The required dead time is a function of the power rating of the device, considering one leg of a multi-phase inverter with gate signal supplied from a gate drive circuit. The waveforms associated with Figure 3.80 are shown in Figure 3.81.

Figure 3.80 One leg of multiphase PWM inverter with time delay circuit

Figure 3.81 Gate control signals V_g1 and V_g2, and output voltages at i_a > 0 and i_a < 0, showing IGBTs (T₁, T₂) and diode (D₁,D₂) ON conditions

Figure 3.80 shows one of the legs of the basic multiphase PWM inverter with RL ...