The Pentium M
In order to meet the new challenges posed by the power-efficient computing paradigm, Intel’s Israel-based design team drew on the older, time-tested P6 microarchitecture as the basis for its new low-power design, the Pentium M. The Pentium M takes the overall pipeline organization and layout of the P6 in its Pentium III incarnation and builds on it substantially with a number of innovations, allowing it to greatly exceed its predecessor in both power efficiency and raw performance (see Table 12-1).
Table 12-1. Features of the Pentium M
Introduction Date | March 12, 2003 |
Process | 0.13 micron |
Transistor Count | 77 million |
Clock Speed at Introduction | 1.3 to 1.6 GHz |
L1 Cache Size | 32KB instruction, 32KB data |
L2 Cache Size (on-die) | 1MB |
Most of the Pentium ...
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